Principal / Staff Design Verification Engineer
Bangalore
Our client can be described as "Developing Foundational Technologies for Chiplet Based Semiconductor Design". They are an early-stage startup, pioneering technologies for the emerging multi-chiplet system-on-package paradigm. Their mission is to enable the next wave of growth in the semiconductor space, and they're looking for passionate individuals to join a seasoned and dynamic team.
Positions Available in Bengaluru, India / fully onsite
Principal Design Verification engineer Responsibilities :
- Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
- Write UVM / SystemVerilog code to implement the test plan, checkers, and scoreboards
- Collaborate with software teams to define and implement configurable test benches
- Work with design teams test plans, failure debug, coverage, etc.
Qualifications and Preferred Skills
BS, MS in Electrical Engineering, Computer Engineering or Computer Science6-12 years and current hands-on experience in block-level / IP-level / SoC-level verificationProficiency in Verilog, SystemVerilogFamiliarity with industry-standard EDA tools for simulation and debugDeep experience with UVM-based test benchesExperience with modern programming languages like PythonKnowledge of Arm AMBA protocols such as AXI, APB, and AHBUnderstanding of Arm CHI protocol is a plusExperience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCsExperience with formal verification techniques, emulation platforms is a plusExcellent problem-solving skills and attention to detailStrong communication and collaboration skillsContact : Uday
Mulya Technologies
muday_bhaskar@yahoo.com