Design Verification Engineer_Full-Time_Bangalore(Hybrid)
Greetings from Best Infosystems Ltd.!
We've spotted your impressive profile and have an exciting opportunity tailored to your skills and passions.
Job Title : Design Verification Engineer
Job Type : Full-Time
Location : Bangalore (Hybrid)
Experience : 8+ years
Job Description : About the role :
- We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs.
- The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions.
Responsibilities :
Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systemsWrite UVM / SystemVerilog code to implement the test plan, checkers, and scoreboardsCollaborate with software teams to define and implement configurable test benchesWork with design teams test plans, failure debug, coverage, etc.Qualifications and Preferred Skills :
BS, MS in Electrical Engineering, Computer Engineering or Computer Science8+ years and current hands-on experience in block-level / IP-level / SoC-level verificationProficiency in Verilog, SystemVerilogFamiliarity with industry-standard EDA tools for simulation and debugDeep experience with UVM-based test benchesExperience with modern programming languages like PythonKnowledge of Arm AMBA protocols such as AXI, APB, and AHBUnderstanding of Arm CHI protocol is a plusExperience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCsExperience with formal verification techniques, emulation platforms is a plusExcellent problem-solving skills and attention to detailStrong communication and collaboration skills