Responsibilities

• Complete ownership of Static timing analysis at full chip level for high speed mixed signal design
• Experience doing multi-mode multi-corner (MMMC) timing and power analysis using primetime / Tempus.
• Experience in DMSA / Tweaker ECO flows for PPA improvements.
• Experience in manual timing fixes, ECO generation for MCMM mode corners.
• Good understanding of SDC constraints and able to translate timing requirements into constraints.
• Responsible for integrating the blocks, analog Ip’s for full chip timing analysis.
• Well aware of place and route methodologies and hands on experience with timing convergence
• Good communication skill to negotiate with top level for convergence.
• Work closely with Project leader for creating schedule, tracking and raising issues / risks to project management.
• Participate in Mentoring new joiners in the group on technical skills.
• Provide inputs for CAD / DA team from Design Implementation perspective.
• Work closely with Logic design team and Analog teams to provide inputs from physical design and STA.
• Work closely with DFT team on scan aspects and provide inputs from physical design.
• Continuously work on methodology and productivity improvements.

Qualifications

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.