Silicon Test Engineering Manager
ThunderSoftBengaluru, Republic Of India, IN16 days ago
Job descriptionDefine and implement end-to-end DFT methodologies (Scan, ATPG, BIST, MBIST, LBIST, JTAG). Ensure high coverage, low power, yield improvement, and robust post-silicon debug. Collaborate across RTL, PD, Verification, and Product Engineering teams. Mentor / lead global teams, establish best practices, and partner with EDA vendors. Contribute to patents / publications and drive continuous innovation. 10+ years in DFT with strong CPU / GPU / SoC experience. Expertise in Synopsys / Cadence / Mentor tools (Tessent, Modus, TestMAX, TetraMAX). Proven tapeout experience in advanced nodes and high-volume silicon. Strong scripting skills (Python / Perl / TCL / C++). Solid knowledge of SoC / CPU architecture (memory, fabrics, I / O, power). Demonstrated leadership in delivering complex silicon programs.
The Role- Lead DFT strategy, architecture, and execution for complex CPU / SoC designs at advanced nodes (7nm / 5nm / 3nm).
- Drive innovation and best practices, and ensure first-pass silicon success with high-quality test solutions.
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Engineering Manager • Bengaluru, Republic Of India, IN
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