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Cpu subsystem design and verification engineer
Cpu subsystem design and verification engineerACL Digital • Bengaluru, Karnataka, India
Cpu subsystem design and verification engineer

Cpu subsystem design and verification engineer

ACL Digital • Bengaluru, Karnataka, India
29 days ago
Job description

Talented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our growing team.

Responsibilities : Design :

Participate in the design of CPU subsystems, collaborating with architects and design engineers.

Contribute to micro-architectural decisions, considering performance, power, and area trade-offs.

Develop detailed design documents and schematics for assigned subsystems.

Verification :

Develop comprehensive test plans and verification strategies for assigned subsystems.

Create and implement System Verilog / UVM testbenches, checkers, and coverage groups.

Execute verification plans, analyse results, and debug failures effectively.

Work closely with verification engineers and architects to identify and resolve issues.

Additional Responsibilities :

Stay up-to-date on the latest advancements in CPU architecture and verification methodologies.

Contribute to technical discussions and actively participate in design reviews.

Collaborate effectively with cross-functional teams to achieve project goals.

Qualifications :

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.

3-5 years of experience in CPU design or verification.

Strong understanding of digital design principles, RTL, and verification methodologies (UVM, System Verilog).

Experience with Verilog / System Verilog coding and debugging.

Familiarity with CPU microarchitecture concepts and verification best practices.

Excellent analytical and problem-solving skills.

Strong communication and collaboration skills.

Ability to work independently and as part of a team.

Benefits :

Competitive salary and benefits package.

  • Opportunity to work on cutting-edge technology and make a real impact.

Regards,

K Himabindu

Mail Id :

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Design Verification Engineer • Bengaluru, Karnataka, India

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