Soc Power Architecture - Power Artist / PTPX

We are looking for an experienced engineer to join the SOC Power Modeling team in the AMD Client Computing and Graphics group. This role involves collaboration with multiple engineering teams including SoC architecture definition, IP design, integration / physical design, verification, and platform architecture. Contributions have a direct impact on the power & performance of AMD s Client products.

The Person :

The candidate should have SOC design process experience from front end to tapeout. The candidate will work closely with the SOC design teams on RTL and emulation-based power estimation, simulation and design data extraction. The candidate must be organized, self-motivated and able to work effectively on teams large and small across multiple sites. He or she must be able to prioritize assignments and drive them to completion. Good verbal and written communication skills are helpful for technical discussions with team members across the globe.

Key Responsibilities :

• Work with front end RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design at SoC level.
• Work with emulation team on power estimates during the pre-silicon design process using Power Artist / PTPX emulation environments and ensure power objectives and goals are met.
• Work with RTL and physical design teams to generate data on design impact from clock and power gating, device type mix and physical implementation options.
• Track IP power development through the design cycle ensuring it meets power budgets - leakage / dynamic at every milestone.
• Work with design verification in validating low power design features at SoC and IP level.

Preferred Experience

Academic Credentials

Skills Required

Tcl, Python