FPGA Engineer

FPGA Engineer

Location : Hyderabad

Experience : 2–6 years

About the Role

We are looking for passionate and skilled FPGA Engineers to join our hardware design and development team. The ideal candidate will have strong hands-on experience with Vivado , FPGA design flow , and Verilog HDL , with a keen aptitude for FPGA IP development and hardware acceleration solutions.

You will be involved in designing, implementing, simulating, and verifying FPGA-based systems that power our next-generation products.

Key Responsibilities

Design, develop, and verify FPGA-based digital systems using Verilog or VHDL .

Work through the complete FPGA design flow : synthesis, implementation, timing analysis, and bitstream generation using Xilinx Vivado .

Develop, integrate, and optimize custom FPGA IP blocks for performance and resource efficiency.

Collaborate with system architects, firmware, and software teams to ensure seamless hardware-software integration.

Conduct simulation and debugging using ModelSim , Vivado Simulator , or similar tools.

Participate in design reviews, documentation, and continuous improvement of design processes.

Optimize FPGA designs for power, area, and performance trade-offs.

Required Skills & Experience

✅ 2–6 years of hands-on experience in FPGA design and development

✅ Strong proficiency in Verilog HDL (VHDL experience is a plus)

✅ Practical exposure to Vivado Design Suite and FPGA design flow

✅ Experience in IP core development , simulation, and verification

✅ Familiarity with timing closure , constraint management , and synthesis optimization

✅ Understanding of digital logic design concepts , finite state machines , & clock domain crossing

✅ Experience in FPGA-based system bring-up and debugging

Good to Have

Exposure to AXI interfaces and SoC / embedded FPGA platforms (e.g., Zynq, Versal)

Knowledge of C / C++ for embedded integration or Python for automation

Experience with Git , JIRA , or other version control and issue-tracking systems

Awareness of hardware verification methodologies (UVM / SystemVerilog)

Education

Bachelor’s or Master’s degree in Electronics Engineering , Electrical Engineering , VLSI Design , or related fields.