Experience : 5+Yrs
Location : Bangalore / Hyderabad / Pune / Noida
Job Description
Responsible for developing detailed Technical SoC verification execution plans
Writing software driven testcases in C
Regression
Coverage Closure
XPROP, Requirement Traceability
Gate Level Simulation at SoC Level
PICe, UCle, Ethernet, UFS, USB related experience required.
Thanks & Regards
Kalpana Bhatia
Assistant Manager-Talent Acquisition
Email : kalpanabhatia@mirafra.com
Design Verification Engineer • Delhi, India