Senior DFT Engineer
HaysBengaluru, Republic Of India, IN3 days ago
Job descriptionDFT Tools flow : Mentor Tessent Implementation : More RTL level implementation LEC at RTL level (pre-DFT vs post-DFT) and gate level SoC / Block : SoC as well as Subsystem / block / partition level Good to have : SSN is must Insertion : Scan, MBIST, occ, edt using ARM DFT flow Patten generation, retargeting and simulation at block as well as SOC. Simulation : zero delay or timings simulation with using sdf Coverage closure Scan Synthesis and timing constraints creation.
We are looking DFT engineer with 5+ years of experience for one of our semicon manufacture client. This is contract to hire opportunity. If you are interested pls share your resume to with below details karthik.ravichandran@hays.com.au
- Notice period;
- CCTC;
- ECTC;
- Current location;
- Available for F2F interview in Bangalore (Final) ;
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Senior Dft Engineer • Bengaluru, Republic Of India, IN
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