About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS) BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fastgrowing product lines, Marvell technology is powering the nextgeneration data processing and workload acceleration platforms for the Carrier, Cloud / Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise / Career solutions including the CXL product line.
What You Can Expect
Define the sub system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification writeup
Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
Implement a specification using RTL coding techniques and best practices
Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.)
Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug
Help develop and / or evaluate design and verification methodologies and participate in improving existing ones
Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning
Provide mentorship to the more junior team member
What We're Looking For
Bachelor's degree in Computer Science, Electrical Engineering or related fields and 12 -20 years of related professional experience.
Master's degree and / or PhD in Computer Science, Electrical Engineering or related fields with 10-18 years of experience.
Experience in creating architectural, micro-architectural, and register specifications.
Verilog / System Verilog RTL coding with System Verilog assertions
Well-versed in all stages of the ASICdesignflow (including specification, architecture anddesignimplementation, prototype bring-up)
Expertise in high speed protocols (Ethernet).
Should have worked on Full Chip Integration of Complex SoC design.
Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs ,Switches , Machine Learning SoCs etc. owning full chip, subsystem and block level architecture and design
Expertise in any of the following domains would be a big plus : networking, embedded systems architecture, computer architecture, machine learning accelerators
Experience with scripting in Perl / Python / Shell
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
This position may require access to technology and / or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and / or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
#LI-RV1
Skills Required
System Verilog, Verilog, Ethernet, RTL Coding
Principal Engineer • Bengaluru / Bangalore, India