Technical Lead

SI-PI Engineer :

• 5+ Years of experience with Strong knowledge in Signal Integrity and Power Integrity fundamental concepts .
• Strong experience in PCB modelling is required.
• Performs Transmission line & Via modelling and carry out experiments to validate modelling outcomes and methodologies.
• Deep Understanding of S-parameter & its modelling concepts for Single ended and differential interfaces.
• Experience in simulating (FD / TD) memory interfaces for Board is required (DDR4 / LPDDR4 / DDR5 / LPDDR5)
• Experience in simulating (FD / TD) High Speed Serial IO interfaces for Board and Package is required (PCIe Gen3 / 4, USB3 / 3.1 and MIPI CSI / DSI Interfaces etc.)
• System level simulation for Read & Write cases for eMMC / NAND Flash / SDIO
• System level simulation for HDMI signals with connectors & cable including CMC for all PVT corners
• Good knowledge of Power Delivery Network, impedance profile analysis, IR Drop Analysis, and time domain Analysis.
• Power Integrity Experience in extracting the PDN model of PCB power rails and perform decoupling capacitor optimization, Loop inductance analysis.
• Should be able to analyze and review the layout files related to Signal integrity and Power Integrity problems.
• Should be able to provide practical solutions to PCB design team based on simulation results and analysis.
• Strong knowledge in simulation tools specifically Hspice, Power SI, Power DC , ADS and other tools like Ansys SIwave, HFSS 3D,