Senior RTL Design Engineer

Hi All,

Lead RTL Design Engineers

Experience Level : 10+ years of RTL design and development

Job Description : Silicon Design Engineer

Location : Hyderabad and Bangalore

Basic Job Deliverable : Silicon Design Engineer (RTL Design and Development)

o Responsible for RTL design and development

o Responsible for generating documents, such as requirements specification, design, user-guide, Interface specification, etc.,

o Experience :

Experience in documenting, designing, implementing complex designs

Experience in designing HW / SW interfaces

Experience in FPGA VHDL and / or Verilog design, Xilinx technology and tools

Experience with RTL design of Ethernet / PCIe / SPI / I2C / USB / GPIO / Memory architectures / DDR / SDRAM / DMA technologies

Experience in HW testing, including working with test equipment – logic and traffic analysers, test generators, etc.

Excellent ability to analyze and isolate RTL and test bench issues, RTL and SW issues

Experience in understanding of software and designing HW interfaces for software

Strong debugging skills at device and board level

Scripting language experience like Perl, Python or TCL

Excellent interpersonal, written and verbal communication skills

Excellent communication, problem solving and analytical skills

Qualification : B.Tech / M.Tech (CSE / ECE / EEE) - Track record of high academic achievement

Regards,

K Himabindu

Mail ID : himabindu.jeevarathnam@acldigital.com