Design Engineer

Job Description :

We are looking for a motivated and detail-oriented Standard Cell Design & Layout Engineer with 3+ years of experience in the VLSI industry. The candidate will be responsible for the design, optimization, and validation of standard cell libraries used in advanced technology nodes for ASIC and SoC development.

Key Responsibilities :

• Design and implement high-quality standard cells to meet performance, area, power, and yield goals.
• Perform circuit-level schematic design and optimization for key standard cells.
• Drive layout creation with close attention to DRC, LVS, and parasitic extraction.
• Ensure cells are optimized for manufacturability, reliability, and design robustness.
• Conduct characterization and validation of libraries (timing, power, signal integrity).
• Collaborate closely with process, CAD, physical design, and EDA teams.
• Support integration of standard cell libraries into digital design flows.
• Perform analysis of cell-level metrics : PPA, noise, IR, electromigration, etc.

Requirements :