Job descriptionExperience verifying digital logic at RTL using SystemVerilog for FPGAs and ASICs.Experience verifying digital systems with standard IP components / interconnects, including microprocessor cores and hierarchical memory subsystems.Experience prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms.Experience with performance verification of ASIC components.Experience creating / using verification components and environments in methodology (VMM, OVM, UVM).Experience with image processing, computer vision, and machine learning applications.Familiarity with ASIC standard interfaces and memory system architecture.