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Senior Design Verification Engineer

Senior Design Verification Engineer

Eximietas DesignBengaluru, Karnataka, India
11 days ago
Job description

Design Verification Engineer

Experience : 5–15 Years

Location : Bangalore

Employment Type : Full-Time

Job Description :

We are seeking a highly skilled and motivated Design Verification Engineer with 5 to 15 years of hands-on experience in SoC verification. The ideal candidate will be responsible for developing and executing comprehensive verification plans for high-performance SoCs, collaborating with cross-functional teams, and ensuring quality standards are met throughout the verification cycle.

Key Responsibilities :

  • Drive SoC Design Verification efforts for complex projects, ensuring thorough validation of functionality and performance.
  • Develop and implement verification strategies, including test plans and test benches for both low-speed peripherals (I2C / I3C, SPI, UART, GPIO, QSPI) and high-speed interfaces (PCIe, Ethernet, CXL, MIPI, DDR, HBM).
  • Conduct Gate-level simulations and power-aware verification using Xprop and UPF.
  • Collaborate with architects, designers, and pre / post-silicon teams to define and validate verification requirements.
  • Implement and analyze System Verilog assertions and coverage (functional, toggle, code).
  • Guide and mentor junior verification engineers while fostering a collaborative and innovative team environment.
  • Ensure verification signoff criteria are met, with complete and accurate documentation.
  • Contribute to continuous improvement of verification methodologies and best practices.
  • Integrate third-party VIPs from Synopsys and Cadence.

Required Skills & Experience :

  • Strong expertise in UVM and System Verilog-based verification environments.
  • Hands-on experience with :
  • SoC-level and IP-level verification
  • DDR, HBM, Xprop, and UPF-based simulations
  • Processor-based SoC verification environments (native, Verilog, System Verilog, UVM)
  • Proficiency in verification tools like VCS, Xsim, waveform analyzers.
  • Solid experience in scripting (Shell, Makefile, Perl) and C-SystemVerilog handshaking.
  • Strong understanding of test practices and adherence to verification quality standards.
  • Problem-solving mindset with excellent analytical and debugging skills.
  • Qualifications :

  • Bachelor’s, Master’s, or PhD in Computer Science, Electrical / Electronics Engineering, or a related field.
  • 5 to 15 years of relevant experience in SoC design verification.
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    Senior Design Verification Engineer • Bengaluru, Karnataka, India