Senior Design Verification Engineer

Job Title : ASIC Design & Verification Engineer

Location : Bangalore / Pune

Experience : 4 – 10 Years

Notice Period : Immediate joiners preferred (0–15 days)

About the Role :

We are seeking experienced and motivated ASIC Design & Verification Engineers to join our high-performance team. This is a hands-on technical role where you will drive testbench architecture , test plan creation , and verification execution for cutting-edge IP and SoC designs across domains such as AI, networking, and automotive.

Key Responsibilities :

• Create and execute detailed test plans based on specifications and micro-architecture.
• Design and develop UVM-based testbenches at IP, subsystem, or SoC level.
• Develop and integrate components : drivers, monitors, scoreboards, sequences, and agents.
• Write and execute both directed and constrained-random test cases .
• Achieve and track functional and code coverage goals ; drive closure.
• Debug simulation issues using waveform tools and collaborate with design teams for resolution.
• Implement assertions (SVA) and apply formal techniques as needed.
• Contribute to RTL reviews and integration if required.

Required Skills :

Good to Have :

Why Join Us?

Interested? Let's connect!

Email : prabhu.p@acldigital.com

WhatsApp : +91 87543 87484