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Senior DFT Engineer - ASIC Design

Senior DFT Engineer - ASIC Design

Bharat Head HuntersBangalore
1 day ago
Job description

Job Opening : Senior DFT Engineer (ASIC)

Experience : 7+ Years

Location : Bangalore

Domain : ASIC / Semiconductor

Job Type : the Role :

We are seeking a highly skilled DFT Engineer with 8+ years of hands-on experience in ASIC / DFT simulation, silicon validation, and production test strategies. The ideal candidate must have full-chip DFT experience and a solid command of industry-standard tools for ATPG, MBIST, and Responsibilities

  • Drive Design-for-Test (DFT) architecture, planning, and implementation for ASIC designs
  • Develop and validate test methodologies including ATPG, MBIST, and scan insertion
  • Work on full-chip DFT insertion, verification, and validation workflows
  • Interface with RTL designers, verification teams, and product engineering for DFT sign-off
  • Conduct simulation and silicon validation for DFT features
  • Support test vector generation, coverage analysis, and production test Technical Skills :
  • 7+ years of hands-on experience in ASIC / DFT including simulation and silicon bring-up
  • Proven experience in at least one full-chip DFT implementation
  • Strong expertise in the following tools :

1. ATPG : TestKompress or equivalent

2. MBIST : Mentor ETVerify or similar

3. Simulation : VCS (preferred), ModelSim or equivalent

  • Deep understanding of :
  • 1. Scan insertion and compression techniques

    2. Memory BIST architecture and implementation

    3. DFT verification flow and coverage Skills :

  • Good exposure to Synthesis and STA constraints
  • Familiarity with DFT automation scripting using Tcl, Perl, or Python
  • Silicon bring-up and debug experience is highly desirable
  • Experience with production test vector handoff and Skills :
  • Excellent communication and teamwork skills
  • Analytical mindset with attention to detail
  • Ability to work in a cross-functional and collaborative environment
  • ref : hirist.tech)

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