As a Design Verification Engineer, you will be responsible for verifying complex digital designs, ensuring they meet functional and performance requirements. You will collaborate closely with cross-functional teams to deliver high-quality silicon solutions that meet customer requirements and industry standards.
Key Responsibilities :
- Testbench Development : Develop and maintain advanced verification environments using SystemVerilog and UVM methodologies, including the creation of testbenches, checkers, scoreboards, and verification IPs.
- Protocol Verification : Lead the verification of complex protocols such as PCIe, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, and HBM, ensuring compliance with industry standards and specifications.
- Verification Planning : Create comprehensive verification plans, define test strategies, and develop test cases to ensure thorough functional coverage and validation of design specifications.
- Coverage Analysis : Perform functional and code coverage analysis, drive coverage closure, and identify and address verification gaps.
- Low Power Verification : Conduct power-aware simulations using UPF (Unified Power Format) to validate low-power design features and ensure power integrity.
- Debugging and Issue Resolution : Identify and resolve functional and performance issues in collaboration with design and architecture teams, utilizing simulation tools and debugging techniques.
- Collaboration : Work closely with RTL design, physical design, DFT, and software teams to address design challenges and ensure seamless integration.
- Documentation : Create and review verification documentation, including test plans, test cases, and verification reports.
Mandatory Qualifications :
Education : Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Science, or a related field.Experience : 8+ years of hands-on experience in ASIC / SoC design verification.Technical Skills :
Expertise in SystemVerilog and UVM methodologies.In-depth knowledge of digital design and verification concepts.Experience with verification of complex protocols such as PCIe, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, and HBM.Proficiency in low power verification using UPF.Strong debugging skills and familiarity with simulation tools.Experience in coverage-driven verification and achieving coverage closure.Soft Skills :
Strong problem-solving and analytical abilities.Excellent communication and collaboration skills.Ability to work effectively in a team-oriented environment.ref : hirist.tech)